Si2: Common Power Format Specification, Version => Improved methodology convergence with CPF flows. 5. 2 June Low-power. Latest version of IEEE /UPF available for free defines the relationship between the low power design specification and the logic design. IEEE UPF . – IEEE UPF .. Si2: Common Power Format Specification, Version => Improved methodology.


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A higher process node is definitely attractive as more functionality integration is possible in a smaller die area at a lower cost.

Magic Blue Smoke

However, in reality, this comes at the cost of exponentially increasing leakage power. This is because the minimum gate-to-source voltage differential that is needed in CMOS devices to create a conducting path between the source and the drain terminals known as threshold voltage has been pushed to its limit.

Leakage power is a function of upf 2 0 specification threshold voltage, and at smaller device geometries, its contribution to total energy dissipation becomes significant. Device supply voltage and leakage upf 2 0 specification directly contribute to leakage power; while switching activity of the capacitive load on supply voltage and its switching frequency contribute to dynamic power.

Download IEEE Unified Power Format (UPF) standard free

So it is obvious that reducing supply voltage can be used to control both leakage and dynamic power dissipation. This became a major power management trend in the last few years, largely because the chip design and verification community has more control over voltage as a design parameter than it does over integrated circuit fabrication upf 2 0 specification technologies that are more affected by the foundries.

Thus, mainstream power management and reduction techniques are solely based on direct manipulation of voltage, in terms of supply power connectivity and voltage area or power network distributions on the chip. However, these are insufficient to understand and reflect in the power aware verification plan, or power intent, which is necessary to start power- or voltage-aware verification at the register transfer level RTLor even after gate-level synthesis.

upf 2 0 specification

Highlights of IEEE UPF Standard – Magic Blue Smoke

The UPF specification defines, as minimum requirements, the names and number of power domains, their constituent elements in terms of HDL instances, the power distribution network for the system, and the corresponding power states. Further requirements upf 2 0 specification added for different strategies depending on a number of conditions and considerations.

In fact, modeling of UPF is mostly governed by target design objectives and applicable power management and reduction techniques. The fundamental constituent parts for UPF constructions are broadly based on the following categories: Specifically, the design scope may include hierarchical top-design-module or instance names and power domains whose boundaries are defined by the hierarchical instance paths.

Understanding the UPF Power Domain and Domain Boundary

The power upf 2 0 specification — for example, isolations ISOlevel-shifters LSpower switches PSWand retention flops RFF — also refer to design or HDL instances, ports, and nets for inferring or inserting corresponding cells and connecting power supplies and control signals.

The syntax ensures accurate definition and semantic guides to abide with the inherent logical and lexical meaning of the defined constructs. Importantly, UPF is the driving force for all PA design verification and implementation automation tools.


These tools interpret and analyze the UPF fundamental upf 2 0 specification according to source and sink communication models for inter or intra domain communications, strategy association, special power upf 2 0 specification cell ISO, LS, etc.

The succeeding sections focus on the fundamental construct of UPF and its methodologies for defining and distinguishing a power domain and domain boundary.

This is primarily based on the LRM and secondarily on different design implementation choices.


The mainstream techniques adopted today, as shown below, are mostly based on design type and the complexity demands for system-on-chip SoCASIC, microcontroller unit MCUor processor core design implementations.

New releases are upf 2 0 specification a superset of semantic and syntactic expressions from its predecessors. Hence power domain definition, syntax, and semantics in this article are explained in light of UPF 2.

Figure 1 shows an HDL design block diagram with only a portion of the design overlaid by power domains with specific design instances. The power domains also show their respective On or On-Off status.

The UPF strategies i.

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